Silicon on Silicon wafer thinning
Learn Logitech process routes for thinning down the top wafer of a two wafer fusion bonded assembly.
With over 50 years experience in the production of lapping & polishing systems for wafer processing, Logitech has developed a process for the thinning of Silicon on Silicon wafers.
Learn the process:
Download the application note to learn the process routes and methodologies to allow you achieve a final thickness as low as 2μm on the top wafer of your Silicon on Silicon fusion bonded wafer.
You'll also benefit from insight on:
- Temporary bonding that minimises risk of breakage whilst maintaining sample yield
- Intelligent features for automated processing operations with minimal user input
- Two-in-one systems for first phase thinning and subsequent polishing
Embrace the cutting edge – you’re in safe hands.